# ordering

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**Robertson–Seymour theorem**— In graph theory, the Robertson–Seymour theorem (also called the graph minor theorem[1]) states that the undirected graphs, partially ordered by the graph minor relationship, form a well quasi ordering.[2] Equivalently, every family of graphs that …122

**Ordered graph**— An ordered graph is a graph with a total order over its nodes. In an ordered graph, the parents of a node are the nodes that are joined to it and precede it in the ordering. More precisely, n is a parent of m in the ordered graph if and n < m …123

**State machine replication**— Introduction from Schneider s 1990 survey: : Distributed software is often structured in terms of clients and services. Each service comprises one or more servers and exports operations that clients invoke by making requests. Although using a… …124

**philosophy, Western**— Introduction history of Western philosophy from its development among the ancient Greeks to the present. This article has three basic purposes: (1) to provide an overview of the history of philosophy in the West, (2) to relate… …125

**Two-phase locking**— This article is about concurrency control. For commit consensus within a distributed transaction, see Two phase commit protocol. In databases and transaction processing two phase locking, (2PL) is a concurrency control method that guarantees… …126

**Arrow's impossibility theorem**— In social choice theory, Arrow’s impossibility theorem, the General Possibility Theorem, or Arrow’s paradox, states that, when voters have three or more distinct alternatives (options), no voting system can convert the ranked preferences of… …127

**Antimatroid**— In mathematics, an antimatroid is a formal system that describes processes in which a set is built up by including elements one at a time, and in which an element, once available for inclusion, remains available until it is included. Antimatroids …128

**Memory barrier**— Memory barrier, also known as membar or memory fence or fence instruction, is a type of barrier and a class of instruction which causes a central processing unit (CPU) or compiler to enforce an ordering constraint on memory operations issued… …